This invention relates to an automatic lockup low-voltage biasing circuit having first and second input terminals, to which respective voltage values are applied, and an internal node coupled to both input terminals to pick up the highest voltage value from those applied to the input terminals.
There are several fields of application where a need currently exists for integrated electronic circuits with bootstrap architectures, that is, capable of locking an internal supply, potential of an integrated circuit to a supply voltage reference at a higher potential.
This need is felt especially in those application fields where an improved efficiency of CMOS circuits is sought, for which circuits a higher gate terminal drive voltage allows the performance of power switches to be improved or stable bandgap voltage references to be provided even where the supply is insufficient for proper biasing.
In this context, it is known to provide biasing circuits with bootstrap characteristics, and the main types of such circuits will be reviewed herein below.
The features that a biasing circuit should exhibit in order to meet the above requirements will now be discussed.
A biasing circuit should be capable of locking the potential at a node VH to the higher of two distinct voltage references V1, V2 available, namely:
VH=max(V1,V2).
A biasing circuit should be capable of correctly locking the potential VH even in extreme conditions, namely:
V1 greater than Vgs, V2=0xe2x80x83xe2x80x831)
V2 greater than Vgs, V1=0.xe2x80x83xe2x80x832)
In addition, such a circuit should have minimal static consumption.
Further important features are a capability to lock up the node VH continuously, without uncertainty or promoting cross-conduction between the sources V1, V2. Furthermore, it is desired that the circuit can be operated at very low supply voltages, e.g., on the order of 0.7V.
Finally, a biasing circuit should exhibit a minimal voltage drop across its pass elements.
A first type of a circuit according to the prior art comprises first D1 and second D2 diodes respectively connected between supply voltage references V1, V2 and a common node VH. The diodes are formed by bipolar transistors having respective base-emitter Vbe and collector-emitter Vce voltage drops.
It is the provision of the diodes that restricts the applicability of this approach, because the voltage drop across each diode only allows the following potential to be attained:
VH=max(V1, V2)xe2x88x92Vbeon, where Vbeon is equal to the base-emitter voltage drop at the turned-on diode.
Accordingly, such a biasing circuit would only make sense at higher voltages than
max(V1,V2) greater than 2*Vbe+Vce.
A second known solution is described in PCT application No. WO 90/06012, which relates to an integrated circuit protected against reversal of the supply battery potential. This integrated circuit comprises a biasing circuit that only operates correctly when
V1xe2x88x92V2 greater than (Vbe+R*Ib).
This circuit has fairly high static consumption which is dependent on the load applied to the node VH [referred to as I(V_HIGH) in the patent specification] according to relation Ibias=VH/xcex2.
A third known solution is described in U.S. Pat. No. 5,159,207, concerning a circuit for dynamic isolation of integrated circuits.
The object of such a circuit is to provide a substrate bias in integrated circuits where the voltage Vout can drop below ground potential (GND). In particular, a bipolar transistor of the substrate vertical NPN type can lock up the substrate potential in accord with the following relation:
Viso=min(Vout, Vgnd)+Vcesat.
The drop of potential, Vcesat, is approximately 200 mV. However, the circuit also exhibits static consumption when a current flows through the substrate. In particular, the static consumption is dependent on the substrate current according to relation Ibias=Iiso/xcex2.
There are other biasing circuits available commercially which have self-bootstrapping features. For example, certain switching regulators from Analog Device can implement highly efficient internal bootstrap architectures.
While being in several ways advantageous, the operation of such regulators is very much restricted by that, in the following conditions:
Voutxe2x88x92Vin greater than Vbeon and Vin=0,
the current draw by the device is high. In addition, if the difference between the input and output voltages is brought to 1V in value, irreversible damage is caused to the regulator.
These and other prior art solutions, although providing biasing circuits of good efficiency, have certain limitations and deficiencies, including a relatively high static consumption, the effects of cross-conduction phenomena, and an inability to operate on very low supply voltages.
Embodiments of this invention provide an automatic lock-up biasing circuit having a bootstrap architecture which can afford minimal static consumption and allow operation even on very low supply voltages.
These embodiments use a maximum voltage comparator having reference voltage values applied to input terminals, and has an output connected to a level shifter adapted to generate drive signals to respective enable elements that are connected between the reference voltages and an internal potential lock-up node. Also presented is a step DC/DC converter that uses at least one of the described biasing circuits.
The features and advantages of a circuit according to this invention can be more clearly understood by reading the following detailed description of practical embodiments thereof, as illustrated by way of non-limitative examples in the accompanying drawings.